Sessions

class nifpga.session.Session(bitfile, resource, no_run=False, reset_if_last_session_on_exit=False, **kwargs)

Session, a convenient wrapper around the low-level _NiFpga class.

The Session class uses regular python types, provides convenient default arguments to C API functions, and makes controls, indicators, and FIFOs available by name. If any NiFpga function return status is non-zero, the appropriate exception derived from either WarningStatus or ErrorStatus is raised. Example usage of FPGA configuration functions:

with Session(bitfile="myBitfilePath.lvbitx", resource="RIO0") as session:
    session.run()
    session.download()
    session.abort()
    session.reset()

Note

It is always recommended that you use a Session with a context manager (with). Opening a Session without a context manager could cause you to leak the session if Session.close() is not called.

Controls and indicators are accessed directly via a _Register object obtained from the session:

my_control = session.registers["MyControl"]
my_control.write(data=4)
data = my_control.read()

FIFOs are accessed directly via a _FIFO object obtained from the session:

myHostToFpgaFifo = session.fifos["MyHostToFpgaFifo"]
myHostToFpgaFifo.stop()
actual_depth = myHostToFpgaFifo.configure(requested_depth=4096)
myHostToFpgaFifo.start()
empty_elements_remaining = myHostToFpgaFifo.write(data=[1, 2, 3, 4],
                                                  timeout_ms=2)

myFpgaToHostFifo = session.fifos["MyHostToFpgaFifo"]
read_values = myFpgaToHostFifo.read(number_of_elements=4,
                                    timeout_ms=0)
print(read_values.data)

class WaitOnIrqsReturnValues(irqs_asserted, timed_out)

irqs_asserted

Alias for field number 0

timed_out

Alias for field number 1

__init__(bitfile, resource, no_run=False, reset_if_last_session_on_exit=False, **kwargs)

Creates a session to the specified resource with the specified bitfile.

Parameters:

• bitfile (str)(Bitfile) – A bitfile.Bitfile() instance or a string filepath to a bitfile.
• resource (str) – e.g. “RIO0”, “PXI1Slot2”, or “rio://hostname/RIO0” or an already open session
• no_run (bool) – If true, don’t run the bitfile, just open the session.
• reset_if_last_session_on_exit (bool) – Passed into Close on exit. Unused if not using this session as a context guard.
• **kwargs – Additional arguments that edit the session.

abort()

Aborts the FPGA VI.

acknowledge_irqs(irqs)

Acknowledges an IRQ or set of IRQs.

Parameters:irqs (list) – A list of irq ordinals 0-31, e.g. [0, 6, 31].

close(reset_if_last_session=False)

Closes the FPGA Session.

Parameters:reset_if_last_session (bool) – If True, resets the FPGA on the last close. If true, does not reset the FPGA on the last session close.

download()

Re-downloads the FPGA bitstream to the target.

fifos

This property returns a dictionary containing all FIFOs that are associated with the bitfile opened with the session. A FIFO can be accessed by its unique name.

fpga_vi_state

Returns the current state of the FPGA VI.

registers

This property returns a dictionary containing all registers that are associated with the bitfile opened with the session. A register can be accessed by its unique name.

reset()

Resets the FPGA VI.

run(wait_until_done=False)

Runs the FPGA VI on the target.

Parameters:wait_until_done (bool) – If true, this functions blocks until the FPGA VI stops running

wait_on_irqs(irqs, timeout_ms)

Stops the calling thread until the FPGA asserts any IRQ in the irqs parameter or until the function call times out.

Parameters:

• irqs – A list of irq ordinals 0-31, e.g. [0, 6, 31].
• timeout_ms – The timeout to wait in milliseconds.

Returns:

session_wait_on_irqs (namedtuple):

session_wait_on_irqs.irqs_asserted (list): is a list of the
    asserted IRQs.
session_wait_on_irqs.timed_out (bool): Outputs whether or not
    the time out expired before all irqs were asserted.